THE UNIVERSITY of EDINBURGH

DEGREE REGULATIONS & PROGRAMMES OF STUDY 2011/2012

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DRPS : Course Catalogue : School of Informatics : Informatics

Undergraduate Course: Computer Design (INFR09010)

Course Outline
School School of Informatics College College of Science and Engineering
Course type Standard Availability Available to all students
Credit level (Normal year taken) SCQF Level 9 (Year 3 Undergraduate) Credits 10
Home subject area Informatics Other subject area None
Course website http://www.inf.ed.ac.uk/teaching/courses/cd Taught in Gaelic? No
Course description This course provides an introduction to the fundamental concepts of the different ways computers can be analysed and designed. The course does not look at the differences between machines with different types of instruction set, nor does it cover design techniques for extracting maximum performance from computers - these aspects of computer hardware are covered in the Computer Architecture course. The issues and techniques covered in the Computer Design course are relevant to the design of all computers, regardless of their particular architecture.

The course is partitioned into three sections. The short first section revises the design of combinational and sequential logic. The second section demonstrates how to analyse and design systems of the complexity of a simple CPU or I/O controller. The third section of the course covers the design of a complete computer capable of executing assembly code programs and different control strategies for performing I/O.
Entry Requirements
Pre-requisites Co-requisites
Prohibited Combinations Other requirements Successful completion of Year 2 of an Informatics Single or Combined Degree, or equivalent by permission of the School.
Additional Costs None
Information for Visiting Students
Pre-requisites None
Displayed in Visiting Students Prospectus? Yes
Course Delivery Information
Delivery period: 2011/12 Semester 1, Available to all students (SV1) WebCT enabled:  No Quota:  None
Location Activity Description Weeks Monday Tuesday Wednesday Thursday Friday
CentralLecture1-11 12:10 - 13:00
CentralLecture1-11 12:10 - 13:00
First Class First class information not currently available
Exam Information
Exam Diet Paper Name Hours:Minutes
Main Exam Diet S2 (April/May)2:00
Resit Exam Diet (August)2:00
Delivery period: 2011/12 Semester 1, Part-year visiting students only (VV1) WebCT enabled:  No Quota:  None
Location Activity Description Weeks Monday Tuesday Wednesday Thursday Friday
CentralLecture1-11 12:10 - 13:00
CentralLecture1-11 12:10 - 13:00
First Class First class information not currently available
Exam Information
Exam Diet Paper Name Hours:Minutes
Main Exam Diet S1 (December)2:00
Summary of Intended Learning Outcomes
1 - Build state machines to implement a circuit or system to a specification.
2 - Interconnect circuits for systems of higher complexity, specifically up to the complexity of the components required in a simple computer processor datapath.
3 - Analyse and synthesise circuits to control and sequence the flow of data within a simple cpu or microcontroller.
4 - Analyse and synthesise circuits to control and sequence the flow of data between a simple cpu, memory systems and input/output device controllers.
5 - Design and implement a microprogrammed controller for a given simple cpu architecture.
6 - Gain familiarity with: design and simulation software; designing systems with Verilog HDL; programming designs into a large field-programmable gate array device (FPGA); using an assembly language to implement a design in a programmable microcontroller.
Assessment Information
Written Examination 75
Assessed Assignments 25
Oral Presentations 0

Assessment
There are four practical exercises for the course. All take place in the hardware lab. The first exercise introduces students to the software and hardware to be used by following a design tutorial all the way through to implementation on a FPGA. The second exercise gives students familiarity with a sequential logic design implemented in a programmable microcontroller. The third exercise requires the design and implementation of the microcode for a specified cpu data path to build a real computer on the FPGA board and a final exercise to program the processor to drive some I/O devices.

If delivered in semester 1, this course will have an option for semester 1 only visiting undergraduate students, providing assessment prior to the end of the calendar year.
Special Arrangements
None
Additional Information
Academic description Not entered
Syllabus Logic Design Revision Simple combinational logic design to state machines for sequential circuits.

Processor Design Data path and control. Fixed program controllers: example and design procedure. Instruction set processors: data path design, simple control, microprogrammed control. ALU design: addition, ripple carry and look ahead adders, negative numbers & subtraction; multiplication sequential multiplier, modification for 2's complement, combinational multiplier, division. Floating point numbers: addition, multiply and divide, implementations.

Computer Systems Memory: Byte vs. word addressing, memory system design, error detection and correction. I/O Design: I/O controller design. Connection of I/O controllers to CPU, synchronization of I/O and CPU, polling, interrupts. Direct Memory Access, bus arbitration, DMA controller implementation. I/O processors. Synchronous and asynchronous buses. Simple performance enhancements to the basic architecture. RISC.

Relevant QAA Computing Curriculum Sections: Computer Hardware Engineering
Transferable skills Not entered
Reading list * V. C. Hamacher, Z. G. Vranesic & S. G. Zaky, 'Computer Organization', 5th edition, McGraw-Hill, 2001. Covers almost all the syllabus (and more). Similar in approach to the lectures.
* D. A. Patterson & J. L. Hennessy, 'Computer Organization & Design: The Hardware/Software Interface', 2nd edition, Morgan Kaufmann, 1998. A different view of most of the material in the syllabus, and a lot of interesting stuff.
* M. M. Mano, 'Digital Design', 2nd edition, Prentice-Hall, 1991. A very good book on logic design, with much more coverage of that part of the syllabus than the previous two books.
* A. S. Tanenbaum, 'Structured Computer Organization', 4th edition, Prentice-Hall, 1999. More a CS2 level book, but worth referring to.
Study Abroad Not entered
Study Pattern Lectures 20
Tutorials 0
Timetabled Laboratories 30
Non-timetabled assessed assignments 20
Private Study/Other 30
Total 100
Keywords Not entered
Contacts
Course organiser Dr Marcelo Cintra
Tel: (0131 6)50 5118
Email: mc@inf.ed.ac.uk
Course secretary Miss Tamise Totterdell
Tel: 0131 650 9970
Email: t.totterdell@ed.ac.uk
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copyright 2011 The University of Edinburgh - 3 April 2011 11:19 am